RISC-V is fully trap-and-emulate-able and so you can even do this without the virtualization extension! Though page table walks and the like will be done in hardware and thus will be very slow.
I think you mean “…will be done in software…,” right?
Yes oops!
Could you do page table walks in RVV?
They're dependent loads, so probably not except for the last level of page tables (and that's just be "prefetching" -- doing 4/8/etc walks in parallel, not 1 walk in less time).
Tangentially related: can anyone here recommend some good resources (preferably even books) on hypervisors? Back in university we got a brief introduction into the topic but I was always interested in learning about it more in depth.
It's one of those topics, that's so modern and based around ecosystem specifics, that you are better off learning from manufacturer manuals and source code, rather than academic theory books.
Like, uni books won't give you an x86 manual because that wouldn't be neutral, but that's precisely the foundation of virtualization, from both a host and guest perspective.
You can read books on x86, but why not use some official intel manual?
I find many manuals miss the big picture. Maybe read the VMware, Xen, and KVM papers first.
Oh for sure, you are seeing the small pictures, but those are objective facts.
Big picture for virtualization? There's many, it's a complex emerging phenomenon which placed a lot of asterisks on computation, is it used for security? Or to patch tech debt? or to provide backwards compatibility? Yes. What is the limit between isolation and efficiency? No one knows yet and there's many answers, you can activate shared cpu caching or disable Spectre mitigations for efficiency, or you can just forego virtualization as a whole and depend on application level multitenancy, which is not a separate topic at all in terms of virtualization, as you can see with tech like containers, and t1/t2 hybrids, it's a spectrum of virtualization, there is no hard line separating the virtualized from the bare metal.