With CMOS the heat puts hard limits for every type of stacking (transistor layers in a chip, or stacking CMOS chips).
In DRAM tech you can stack several (4-8 at least) HMC memory layers on top of one logic layer.
SSD is moving from 100+ towards 1000 layer memory chips.
SSD layers: Do you mean each cell is storing around 100 different values or are cells layered on top of each other (each addressed separately etc.)?
The cells are layered but each cell stores 4 bits in QLC.
Is this why there is more attention on PIM - processing in memory?
You don’t burn active power?
It's mainly as a way to overcome the bandwidth limits between memory and CPU.
It will increase the heat density of the memory, but there's room to play there. Plus there are some designs that use analog electronics for compute, and it reduces power.
Given that this is from 2022 and it says:
> We see RibbonFETs as the best option for higher performance at reasonable power, and we will be introducing them in 2024 along with other innovations, such as PowerVia, our version of backside power delivery, with the Intel 20A fabrication process.
Did they introduce it in 2024? If not, are they still on the roadmap and for what year?
The Intel 20A has been cancelled about a week ago. It was planned to be used for only one product, the Intel Arrow Lake H CPUs for laptops, to be launched in Q1 2025. Now, all Intel Arrow Lake CPUs, both for desktops and for laptops, will be made by TSMC, like also Lunar Lake. Intel will do only assembly and testing for them.
This cancellation has been done so that Intel will be able to use all their resources in developing the better 18A CMOS process. Intel hopes that 18A (with RibbonFETs and backside power delivery) will be their salvation.
18A is intended to be used both for Intel products and for the products of other companies, starting in the middle of 2025 (with Panther Lake for laptops and with Clearwater Forrest and Diamond Rapids for servers). Intel claims that they have working samples of Panther Lake laptop CPUs and Clearwater Forrest server CPUs, made with 18A.
According to Intel, the main problem that must be solved with 18A until the middle of 2025 is to improve its fabrication yields, which for now are much worse than for a mature TSMC process, so unless the yields are improved the 18A process would not be competitive in mass production.
While Intel must make serious efforts to catch up with TSMC, Samsung does not appear to be much better than Intel, because they have exactly the same problem, with fabrication yields much worse than TSMC for the processes with equivalent density.
Intel 20A got cancelled. The follow-up 18A was planned to be 20A fleshed out with a full PDK complete with transistor libraries covering high density and high performance variants, so that it could be competitive as a foundry option for non-Intel chip designs. Now all of Intel's hopes are riding on 18A next year, without the intermediate proof of a working 20A.
Seems they did "introduce" it in 20A this year but implies no commercial use yet, that would be with 18A in 2025[0].
[0]: https://www.intel.com/content/www/us/en/newsroom/opinion/con...
20A is supposedly ready for manufacturing, yet:
https://www.tomshardware.com/pc-components/cpus/intel-announ...
I've played too much recently, that header image immediately put me in mind of Satisfactory.
It's a pretty appropriate game given the subject matter, tbh.
The more I read the article the more I'm inclined to agree, especially with connecting all the wiring to the transistor.
In next months we will see if they will deliver it at 18A node
If they manage to do so, the stock price will reflect it
(2022)